Modelling of Terahertz Planar Schottky Diodes

This thesis deals with the modelling of THz planar Schottky diodes, focusing on analyses of the geometry- dependent parasitics and the diode chip thermal management. Moving towards higher operating frequencies, the electromagnetic couplings pose significant limitations on the diode performance. In this work, a model of the loss at high frequencies for planar diodes is developed, specifically the ohmic losses in the cathode buffer mesa is analysed. As a result, the eddy current, skin and proximity effects have been identified as important loss mechanisms in the buffer mesa. This provides an explanation to the strong frequency dependency of the series resistance, which is not explainable using conventional diode series resistance models. Due to the current crowding effect, the upper boundary of the buffer-layer thickness is approximately one skin depth at the operating frequency, whereas the lower boundary is limited by the spreading resistance at DC. In addition to the ohmic loss, the parasitic capacitance and inductance inherently limit the power coupling to the diode junction. A model is developed to analyse this limitation, i.e by studying the diode resonance requencies as a function of diode geometry. Analysis of the diode resonance frequencies as a function of the pad-to-pad distance is presented. Result shows that there is a trade-off between the parasitic capacitance and inductance, in optimising the power coupling to the junction. Based on the chip layout of frequency doublers developed by Jet Propulsion Laboratory (JPL), a systematic thermal analysis of the multiplier chip is performed. Taking the temperature-dependent material thermal properties into consideration, the result shows that the thermal resistance of the 200 GHz multiplier chip is in the order of 10^3 K/W. Meanwhile, the thermal time constant is more than tens of milliseconds. The simulation result is verified through thermal imaging using infrared microscope. Taking the thermal analysis a step further, a self-consistent electro-thermal model for the multiplier chip is proposed. The thermal model is developed using a thermal resistance matrix approach, with a linear-temperature dependency approximation of the thermal resistance. Compared to the circuit analysis without thermal model, analysis with the electro-thermal model shows a better agreement with the measured result, i.e. within 5% of the measured conversion efficiency

Electro-Thermal Model for Multi-Anode Schottky Diode Multipliers

We present a self-consistent electro-thermal model for multi-anode Schottky diode multiplier circuits. The thermal model is developed for an -anode multiplier via a thermal resistance matrix approach. The nonlinear temperature responses of the material are taken into consideration by using a linear temperature dependent approximation for the thermal resistance. The electrothermal model is capable of predicting the hot spot temperature, providing useful information for circuit reliability study as well as high power circuit design and optimization. Examples of the circuit analysis incorporating the electro-thermal model for a substrateless- and a membrane-based multiplier circuits, operating up to 200 GHz, are demonstrated. Compared to simulations without thermal model, the simulations with electro-thermal model agree better with the measurement results. For the substrateless multiplier, the error between the simulated and measured peak output power is reduced from ~13% to ~4% by including the thermal effect

Modelling of Terahertz Planar Schottky Diodes

This thesis deals with the modelling of THz planar Schottky diodes, focusing on analyses of the geometry- dependent parasitics and the diode chip thermal management. Moving towards higher operating frequencies, the electromagnetic couplings pose significant limitations on the diode performance.In this work, a model of the loss at high frequencies for planar diodes is developed, specifically the ohmic losses in the cathode buffer mesa is analysed. As a result, the eddy current, skin and proximity effects have been identified as important loss mechanisms in the buffer mesa. This provides an explanation to the strong frequency dependency of the series resistance, which is not explainable using conventional diode series resistance models. Due to the current crowding effect, the upper boundary of the buffer-layer thickness is approximately oneskin depth at the operating frequency, whereas the lower boundary is limited by the spreading resistance at DC.In addition to the ohmic loss, the parasitic capacitance and inductance inherently limit the power coupling to the diode junction. A model is developed to analyse this limitation, i.e by studying the diode resonance requencies as a function of diode geometry. Analysis of the diode resonance frequencies as a function of the pad-to-pad distance is presented. Result shows that there is atrade-off between the parasitic capacitance and inductance, in optimising the power coupling to the junction.Based on the chip layout of frequency doublers developed by Jet Propulsion Laboratory (JPL), a systematic thermal analysis of the multiplier chip is performed. Taking the temperature-dependent material thermal properties intoconsideration, the result shows that the thermal resistance of the 200 GHz multiplier chip is in the order of 10^3 K/W. Meanwhile, the thermal time constant is more than tens of milliseconds. The simulation result is verified through thermal imaging using infrared microscope.Taking the thermal analysis a step further, a self-consistent electro-thermal model for the multiplier chip is proposed. The thermal model is developed using a thermal resistance matrix approach, with a linear-temperature dependency approximation of the thermal resistance. Compared to the circuit analysis without thermal model, analysis with the electro-thermal model shows a better agreement with the measured result, i.e. within 5% of the measured conversion efficiency

Modelling and Characterisation of Terahertz Planar Schottky Diodes

This thesis deals with the modelling and characterisation of THz planar Schottky diodes, focusing on analyses of geometry-dependent electrical parasitics and the thermal management of the diode chip. Moving towards higher operating frequencies, the diode performance degrades due to high frequency losses, parasitic couplings and self-heating effects.For geometry-dependent electrical parasitics analyses, the diode equivalent circuit parameters can be extracted from the measured or 3-D EM calculated S-parameters. For planar Schottky diodes, the available parameter extraction methods are typically based on an optimisation approach. In this work, a parameter extraction method based on an analytical approach is proposed. The proposed method allows for a fast and more reliable diode model extraction.In this work, the high frequency diode parasitic esistance model is extended to include the eddy current and a mixture of skin and proximity effects.Due to the eddy current and proximity effects, the upper boundary of the buffer layer thickness is approximately one skin depth at the operating frequency, whereas the lower boundary is limited by the spreading resistance at DC.Reactive energies stored in the parasitic capacitances and inductances cause an inherent limitation in the power coupling bandwidth to the intrinsic diode junction. The influence of diode geometry on fundamental power couplingbandwidth limitation is analysed using the Bode-Fano criterion. The result shows a trade-off between the parasitic capacitance and finger inductance,determined by the pad-to-pad distance, in optimising the diode geometry for a wide band diode matching. A systematic thermal analysis of a 200 GHz multiplier chip developed by JPL is performed. The result shows that the chip thermal resistance is in the order of 10^3 K/W, whereas the overall thermal settling time is more than tens of milliseconds. The simulation result is verified through thermal imaging using infrared microscopy. Taking the thermal analysis a step further, a self-consistent electrothermal model for the multiplier chip is proposed. Compared to the circuit analysis without the thermal model, analysis with the electrothermal model shows a better agreement with the measured result, e.g., an error reduction from ~13% to ~4% between the simulated and measured maximum output power, by including the thermal effect

Schottky diodes for terahertz applications

The Schottky diode has been gaining more and more research interests as a THz source or detector. The aim of the work presented in this thesis is to optimise the Schottky anode contact in order to improve the ideality factor and noise properties. An investigation of the device properties has been carried out using different material structure (mainly based on GaAs) and surface preparation methods. A study of size or edge effects on the device properties was also included. Characterisation techniques used are electrical measurement (I-V and C- V) and surface analysis (AFM). Both I-V and C-V modelling and parameter extractions are implemented using Matlab. The best ideality factor obtained in this work is 1.12 for the largest diode (100x100 μm2) and 1.14 for the smallest diode (40x40 μm2)

Impact of Eddy Currents and Crowding Effects on High Frequency Losses in Planar Schottky Diodes

In this paper, we present the influence of eddy currents, skin and proximity effects on high-frequency losses in planar terahertz Schottky diodes. The high-frequency losses, particularly losses due to the spreading resistance, are analyzed as a function of the ohmic-contact mesa geometry for frequencies up to 600 GHz. A combination of 3-D electromagnetic (EM) simulations and parameter extraction based on lumped equivalent circuit is used for the analysis. The extracted low-frequency spreading resistance shows a good agreement with the results from electrostatic simulations and experimental data. By taking into consideration the EM field couplings, the analysis shows that the optimum ohmic-contact mesa thickness is approximately one-skin depth at the operating frequency. It is also shown that, for a typical diode, the onset of eddy current loss starts at ∼200 GHz, and the onset of a mixture of skin and proximity effects occurs around ∼400 GHz

Geometry Optimization of THz Sub-harmonic Schottky Mixer Diodes

We present a systematic analysis of geometry dependent parasitics for THz sub-harmonic Schottky mixer diodes. In particular, the diode RF power coupling bandwidth has been studied, showing a trade-off between the air-bridge finger length and finger separation for operating frequencies beyond 1 THz

Modeling of GaAs Schottky diodes for terahertz application

3-D models have been developed to study the series resistance (Rs) at DC and the extrinsic parasitic elements (capacitance and inductance) at high frequencies for a Schottky diode chip. For the Rs study, a comparison with the experimental result has been carried out. High frequency properties and the corresponding S-parameters of the Schottky diode chip are simulated using a 3-D finite element electromagnetic solver. The parasitic elements are then extracted and studied as a function of the diode geometry. The outcome of the studies shows the existence of a significant pad-to-pad capacitance through the semi-insulating substrate which could be improved by implementing tapered shape pads

Development of planar THz Schottky diodes

We present the technological development of the air bridge planar Schottky diode process at Chalmers University of Technology for the use as submillimeter wave mixer and multiplier. Our first evaluation is targeted for the heterodyne receivers (i.e. atmosphere sounders) operation at 340 GHz. The aim is to develop a reliable and repeatable Schottky diode process, with good electrical and mechanical characteristics. In addition, the scalability of the diode geometry for diode integration in THz circuits is also taken into account in this development

Development of planar schottky diodes

We present the development of an air-bridged planar Schottky diode process at Chalmers University of Technology for use in submillimeter wave mixer and multiplier circuits. As a first step evaluation has been targeted for heterodyne receivers (atmosphere sounders) operation at 340 GHz. The aim is to develop a reliable and repeatable discrete Schottky diode process, with good electrical and mechanical characteristics, which also can be scaled to smaller anodes and extended to integrated diode circuits for THz frequencies. Air-bridged Schottky structures were demonstrated in the late 1980\u27s as a reliable, high quality alternative to whisker contacted diodes. This approach gives a mechanically stable structure and still low parasitic capacitances. The Chalmers diode process is based on electron beam lithography, with a beam spot less than 5 nm, which allows for precise anode and airdridge formation. Hence, this process module can also be utilized for submicron size anodes and. terahertz monolithic integrated circuits (TMICs). Several batches with different shapes of anodes have been fabricated and evaluated with respect to DC/RF-performance. Repeatability of the diode\u27s characteristics indicates good control of the diode fabrication process. We will present the main fabrication route, optimization and repeatability of the diodes as well as RF results from mixer and multiplier measurements up to 340 GHz